In this article we are going to talk about CPU architecture.
RISC stands for reduced instruction set computer and CISC - for complex instruction set computer.
The major difference is that
RISC chips use simpler instructions sets to achieve higher clock frequencies and process more instructions
per clock cycle than CISC processors.
Typically, CISC chips have a large amount of different and complex instructions.
The philosophy behind it is that hardware is always faster than software, therefore one should make a powerful
instruction set, which provides programmers with assembly instructions to do a lot with short programs.
In common, CISC chips are relatively slow (compared to RISC chips) per instruction, but use little
(less than RISC) instructions.
Intel and AMD, for example, develop CISC processors (x86), while Apple and SUN use RISC architecture.
Major problem of RISC - they don't afford the widespread compatibility, that x86 chips do.
There is still considerable controversy among experts about which architecture is better.
Some say that RISC is cheaper and faster and therefor the architecture of the future.
Others note that by making the hardware simpler, RISC puts a greater burden on the software.
Software needs to become more complex. Software developers need to write more lines for the same tasks.
Therefore they argue that RISC is not the architecture of the future, since conventional CISC chips are
becoming faster and cheaper anyway.
RISC and CISC architectures are becoming more and more alike.
Many of today's RISC chips support just as many instructions as yesterday's CISC chips.
The PowerPC 601, for example, supports more instructions than the Pentium. Yet the 601 is considered a RISC chip,
while the Pentium is definitely CISC. Further more, today's CISC chips use many techniques formerly associated
with RISC chips.
So simply said: RISC and CISC are growing to each other.
- PC Platform Mindshare class (June 2001)
- Understanding PCI-Bus subtleties optimizes system performance, Paul Schreier,EE Feb 2000
- Microcomputer architecture, Ivao Moricita , Tokyo 1994